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A planar Al-Si Schottky Barrier MOSFET operated at cryogenic temperatures

机译:平面al-si肖特基势垒mOsFET在低温下工作   温度

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摘要

Schottky Barrier (SB)-MOSFET technology offers intriguing possibilities forcryogenic nano-scale devices, such as Si quantum devices and superconductingdevices. We present experimental results on a novel device architecture wherethe gate electrode is self-aligned with the device channel and overlaps thesource and drain electrodes. This facilitates a sub-5 nm gap between thesource/drain and channel, and no spacers are required. At cryogenictemperatures, such devices function as p-MOS Tunnel FETs, as determined by theSchottky barrier at the Al-Si interface, and as a further advantage,fabrication processes are compatible with both CMOS and superconducting logictechnology.
机译:肖特基势垒(SB)-MOSFET技术为低温纳米级器件(例如Si量子器件和超导器件)提供了诱人的可能性。我们提出了一种新颖的器件结构的实验结果,其中栅电极与器件沟道自对准,并且与源电极和漏电极重叠。这有助于在源极/漏极和沟道之间形成小于5 nm的间隙,并且不需要隔离层。在低温下,这种设备可以用作p-MOS隧道FET(由Al-Si界面处的肖特基势垒确定),并且进一步的优势是,制造工艺与CMOS和超导逻辑技术兼容。

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